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Free Expert Guides on Power Systems, Circuit Design & Electrical Troubleshooting

Access free engineering resources from IEE Business—covering power design, circuit layout, equipment selection, and troubleshooting. Expert-developed guides help engineers, procurement, and project teams make better decisions. Stay ahead on smart grids, renewables, efficiency, and AI tools. Improve reliability, reduce downtime, and enhance outcomes with real-world solutions. Explore our knowledge hub today.
Surge Impedance Loading
SIL DefinitionSurge Impedance Loading (SIL) is defined as the power a transmission line delivers to a load that matches the line’s surge impedance.Surge ImpedanceSurge Impedance is the balance point where capacitive and inductive reactances of a transmission line cancel each other out.Long transmission lines (> 250 km) inherently possess distributed inductance and capacitance. When activated, the capacitance feeds reactive power into the line, and the inductance absorbs it.Now if we take the
09/04/2024
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What is Impedance Matching?
What is Impedance Matching?Impedance Matching DefinitionImpedance matching is the process where the input and output impedances of an electrical load are adjusted to reduce signal reflection and maximize power transfer.Smith Chart ToolSmith charts help visualize and solve complex problems in RF engineering by representing parameters like impedance and reflection coefficients across frequencies.Circuit ExplanationImpedance matching circuits often use combinations of resistors, inductors, and capa
07/23/2024
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A Review of Current-Limiting Control of Grid-Forming Inverters Under Symmetrical Disturbances
Grid-forming (GFM) inverters are recognized as a viable solution to increase the penetration of renewable energy in bulk power systems. However, they are physically different from synchronous generators in terms of overcurrent capability. To protect the power semiconductor devices and support the power grid under severe symmetrical disturbances, the GFM control systems should be able to achieve the following requirements: current magnitude limitation, fault current contribution, and fault reco
03/07/2024
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Flowchart of the proposed ANN
The design and advantages of a novel light emitting diode (LED) bandwidth extension technique, based on the adoption of negative impedance converters (NICs), are discussed in the context of visible light communication systems. The design principles of the proposed negative impedance converter are introduced, with analytical derivations of the impedance frequency behaviour and the circuit performance frequency limitations. A two-transistor circuit is designed to generate a negative capacitance ov
03/06/2024
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A Stable Digital Impedance Circuit Design Method for Resistive Source Impedances
The recent discovery that the input impedance of digital impedance circuits is dependent on the external source impedance requires the development of new design procedures to address the significant complexity of this discovery. These circuits are of particular utility for the implementation of difficult non-Foster impedances such as negative capacitance. Therefore, a new digital impedance circuit design procedure is presented where stable digital filter coefficients are computed to provide desi
03/06/2024
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A Low-Noise High-Gain Broadband Transformer-Based Inverter-Based Transimpedance Amplifier
In this paper, a transformer-based bandwidth (BW) extension technique is employed to improve the BW, noise, and silicon area of inverter-based transimpedance amplifiers (TIAs) even when they use inductive peaking. A TIA based on the proposed technique, designed and laid out in a 16-nm FinFET process, demonstrates a 36% increased in BW, a 19% reduction in input-referred noise, and a 57% reduction in silicon area compared to the conventional TIA with inductive peaking. In the proposed TIA architec
03/06/2024
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