SST Voltage Challenges: Topologies & SiC Tech

One of the core challenges of Solid-State Transformers (SST) is that the voltage rating of a single power semiconductor device is far insufficient to directly handle medium-voltage distribution networks (e.g., 10 kV). Addressing this voltage limitation does not rely on a single technology, but rather a "combination approach." The main strategies can be categorized into two types: "internal" (through device-level technological and material innovation) and "external collaboration" (through circuit topology).

1.External Collaboration: Solving via Circuit Topology (Currently the Most Mainstream and Mature Approach)
This is currently the most reliable and widely applied approach in medium- and high-voltage, high-power applications. Its core idea is "strength in unity"—using series connections or modular combinations of multiple devices to share the high voltage.

1.1 Device Series Connection

 Principle: Multiple switching devices (e.g., IGBTs or SiC MOSFETs) are directly connected in series to collectively withstand high voltage. This is analogous to connecting multiple batteries in series to achieve higher voltage.

 Key Challenges:

• Dynamic Voltage Balancing: Due to minor parameter differences among devices (e.g., switching speed, junction capacitance), voltage cannot be evenly distributed across devices during high-speed switching, potentially causing overvoltage and failure in one device.

• Solutions: Complex active or passive voltage balancing circuits (e.g., snubber circuits, gate control) are required to enforce voltage sharing, increasing system complexity and cost.

2. Multilevel Converter Topologies (Mainstream Choice for SST Today)

2.1 Principle: This is a more advanced and higher-performance "modular series" concept. It generates a stepped approximation of a sine wave using multiple voltage levels, so that each switching device only withstands a fraction of the total DC bus voltage.

2.2 Common Topologies:

• Modular Multilevel Converter (MMC): One of the most favored topologies for medium- and high-voltage SSTs. It consists of numerous identical submodules (SMs) connected in series. Each submodule typically includes a capacitor and several switching devices. Devices only endure the voltage of the submodule’s capacitor, effectively solving the voltage stress issue. Advantages include modularity, scalability, and excellent output waveform quality.

• Flying Capacitor Multilevel Converter (FCMC) and Diode-Clamped Multilevel Converter (DNPC): Also commonly used multilevel structures, but become structurally and control-wise complex as the number of levels increases.

• Advantages: Fundamentally solves the voltage rating limitation of individual devices, significantly improves output voltage waveform quality, and reduces filter size.

3. Input-Series Output-Parallel (ISOP) Cascaded Structure

• Principle: Multiple complete, independent power conversion units (e.g., DAB, Dual Active Bridge) are connected with their inputs in series to withstand high voltage and outputs in parallel to deliver high current. This is a system-level modular solution.

• Advantages: Each unit is a low-voltage standard module, simplifying design, manufacturing, and maintenance. High reliability (failure of one unit does not disrupt overall system operation). Highly suitable for the modular design philosophy of SST.

4. Internal Reinforcement: Device-Level Technological Innovation (Future Development Direction)

This approach fundamentally addresses the issue from the perspectives of materials science and semiconductor physics.

4.1 Use of Wide-Bandgap Semiconductor Devices

Principle: New-generation semiconductor materials such as silicon carbide (SiC) and gallium nitride (GaN) have critical breakdown electric fields an order of magnitude higher than traditional silicon (Si). This means that SiC devices can achieve much higher voltage ratings at the same thickness compared to Si devices.
Advantages:

• Higher Voltage Rating: A single SiC MOSFET can now easily reach voltage ratings above 10 kV, whereas silicon IGBTs are typically limited to below 6.5 kV. This enables simplified SST topologies (reducing the number of series-connected devices).

• Higher Efficiency: Wide-bandgap devices offer lower conduction resistance and switching losses, allowing SSTs to operate at higher frequencies, thereby significantly reducing the size and weight of magnetic components (transformers, inductors).
  

• Status: High-voltage SiC devices are currently a hot topic in SST research and are considered a key enabling technology for future disruptive SST designs.

4. 2 Superjunction Technology

• Principle: An advanced technique for silicon-based MOSFETs that introduces alternating P-type and N-type pillar regions to alter the electric field distribution, thereby greatly improving voltage blocking capability while maintaining low on-resistance.

• Application: Primarily used in devices with voltage ratings between 600 V and 900 V. Applied in the low-voltage side or lower-power sections of SSTs, but still insufficient for direct medium-voltage applications.

5. Comparison

How to address the voltage rating limitations of power semiconductor devices in SSTs?

• The most practical and reliable solution at present is to adopt multilevel converter topologies (especially Modular Multilevel Converters, MMC) or cascaded input-series output-parallel (ISOP) structures. These approaches, based on mature silicon-based devices, circumvent the voltage rating bottleneck of individual devices through sophisticated system-level architectures.

• The fundamental solution for the future lies in the maturation and cost reduction of high-voltage wide-bandgap semiconductor devices, particularly silicon carbide (SiC). Once realized, SST topologies can be significantly simplified, enabling a leap forward in efficiency and power density.

In actual SST research and development, multiple technologies are often combined—for example, employing an MMC topology using SiC devices—to achieve optimal performance and reliability.